DVB-S2 and DVB-S2X LDPC Encoder/Decoder

DVB-S2/X LDPC Encoder and Decoder IP Cores are based on high performance forward error correction (FEC) designs from Yongatek team compliant with ETSI EN 302 307 and ETSI EN 302 307-2 standards. The IP Cores use LDPC block codes providing error-correcting performance near Shannon limit with low complexity and flexible hardware design.

Key Features:

  • Compliant with ETSI EN 302 307 and ETSI EN 302 307-2 standards
  • Support for QPSK, 8PSK, 16APSK, 32APSK, 64APSK, 128APSK, 256APSK
  • Adaptable code rates (1/4 to 9/10)
  • Configurable iteration number from 1 to 127
  • Support for up to 100 MSymbol/s throughput
  • Adaptable frame lengths of 16200 bits, 32400 bits and 64800 bits