H264/AVC Video Codec IP Core
The Yongatek H.264/AVC hardware encoder is designed as a modular system with small, efficient, low-power components that perform well-defined tasks. Its main design goal was to make a scalable encoder for megapixel images suitable for use in camera heads and low power recorders.
The Yongatek H264/AVC Encoder IP core is a video encoder that supports the Baseline/Main/High Profiles of the ITU-T H.264 standard. It accepts the highest Full HD video stream as the video input and outputs the encoded bitstream. A single core can encode video up to 1920 × 1080 resolution up to 30 fps. The output bit stream can be decoded by any ITU-T H.264/AVC compliant decoder that meets the level requirements of the stream. Yongatek offers two types of encoders to meet the different goals of H.264/AVC resource utilization and compression:
- H264-Enc-I : Because it only uses intra mode, the IP core is smaller but provides less compression. It does not require external memory.
- H264-Enc-P : Because the inter and intra modes are used together, the kernel provides significantly better compression but uses more resources.
Yongatek H.264/AVC Codec Key Features
- Supports 4: 2: 0, 4: 2: 2 and 4: 4: 4 YCbCr digital video input
- Supports 8-10-12 bit color depth
- Processing speed per pixel supports 2.5 clk cycles
- Very low latency (16 lines' time) from first pixel input.
- Profile Level up to 4.1
- Supports all resolutions multiples of 16
- No CPU required for encoding
- Supports CBR (Constant bit rate), VBR (Variable bit rate)
- Provides CAVLC coding. (Available soon CABAC)
- Supports Deblocking filter
- Provides low bandwidth usage in external memory(DDR2/3/4)
- Device independent design(Intel, Microsemi, Lattice and Xilinx Fpga)
- Safe CDC transfers when using more than one clock domain
- No special timing constraints required
- No false or multi-cycle paths within the same clock domain
- No CDC transfers that need to be constrained (all CDC paths can be excluded)
- Silicon Verified on TSMC 65nm
Yongatek H.264/AVC Codec Interfaces
Yongatek, offers AXI or Avalon bus standards to meet the interface requirements of customers.
- Configuration Interface: AXI4-Lite/Avalon-MM slave with a 32 bits interface and 40 registers to control all the necessary parameters of encoding.
- Video in/out interface: AXI4-Stream/Avalon-ST interface with a data width of 32 bits for reading video input pixel and writing coded video output.
- External memory interface: (only H264-Enc-P) AXI4-Full/Avalon-MM interface with a data width of 32 bits, for reading/writing reconstructed frames.
Applications
- Multimedia systems
- Digital video recorders
- Video processing systems
- Video surveillance systems
- Security cameras store and transmit
- UAV video transfer
IP Deliverables
- Pre-synthesized and verified netlist for Fpga devices
- RTL source code
- Bit accurate C model
- Complete test-bench
- Integration Manual documents
- Release Notes, Design Specification
