ASIC_300x300
YongaTek is giving Digital IC Design and Verification services from RTL to GDS based on a deep technical experience.
  • Design from scratch, system level modelling (MATLAB, Simulink, System C)
  • Micro Architecture Documentation
  • RTL Coding (Verilog, VHDL or System Verilog)
  • Functional Simulation
  • Synthesis
  • Formal Verification
  • Design for Test Insertion
  • Static Timing Analysis and Timing Closure
  • FPGA Prototyping and Validation
  • Project Management and Reporting, Bug Tracking